Computer processor systems continue to get faster and the density of components continues to increase. This presents problems in power management for the computer processor systems, in both peak power and average power usage. High peak power usage requires larger power supplies and can increase noise in the digital circuits. For example, simultaneous component switching can cause high peak power usage, which can cause power/ground bounce. The power/ground bounce, due to intrinsic inductance and capacitance in leads and components, results in noise on the power or ground busses, respectively, and causes logic errors. High average power usage increases power costs and generates heat, which can reduce operational reliability.
Present solutions to power management have a significant detrimental effect on computer processor system performance. One solution is to run the computer processor system slower, which increases computing time. Another solution is to perform fewer speculative operations, i.e., reduce the number of operations that are performed before it is known that the results of those operations will be needed. Another solution is to perform fewer operations in parallel (at the same time). Other solutions include down sizing transistors, which makes them slower and reduces noise margin, and increasing oxide layer thickness, which also reduces transistor speed. The present solutions to power management substantially impair operation of the computer processor system.
It would be desirable to have a system and method of power management for computer processor systems that would overcome the above disadvantages.